The present invention relates to a method and apparatus for low cost signature testing for testing analog and RF circuits. More particularly, the invention relates to such a method and apparatus for use in manufacturing testing, and for use in monitoring the manufacturing process.
Analog and RF circuits are characterized by a set of performance parameters that typically vary continuously over a range. These performance parameters result from design as modified by variations in the manufacturing process that occur over time. Because of this variation, it is often necessary to test at least some of the circuits produced by a given manufacturing process to ensure that the performance parameters of the circuits fall within given specification limits.
However, traditional testing methods impose an increasing burden in the form of test time as a result of the ever increasing complexity and speeds of analog and RF circuits. For example, straightforward testing employs automated or automatic test equipment (“ATE”) to stimulate the circuit under test (CUT) in a manner designed to induce the circuit to provide an output which directly reflects the value of each performance parameter which it is desired to test. The output is used to determine whether the parameter is within specification limits, in which case the CUT is considered “good” or is considered to “pass,” or whether the parameter is outside the specification limits, wherein the CUT is considered “bad” or is considered to “fail.” Each performance parameter requires, in general, a specific stimulus appropriate for testing that parameter and a corresponding output measurement, and it is therefore time consuming to step through all of the required test stimuli to obtain the performance parameters of interest in this manner.
Various techniques have been proposed to minimize this test time and, therefore, the cost of testing. Such techniques have attempted to arrive at a single test stimulus effective for discerning whether the CUT passes or fails. For example, S. J. Tsai, “Test vector generation for linear analog devices,” International Test Conference, pp. 592-597, 1991, characterizes the circuit as either “good” or “bad” as a result of its response to a stimulus that maximizes the difference in response between circuits having these characterizations. The stimulus is obtained by optimization methods, wherein the impulse responses for good and bad circuits are used as input to an optimization model, the result of which produces the test stimulus.
Alternatively, as in W. Lindermeir, H. E. Graeb and K. J. Antreich, “Design of Robust Test Criteria in Analog Testing,” International Conference on Computer Aided Design, pp. 604-611, 1995, a user provides a set of proposed test stimuli, and the method provides for choosing the one that is most effective at discriminating between “good” and “bad” circuits.
Some serious drawbacks of these methods are that neither is applicable to non-linear circuits, and neither provides quantitative information about the circuit performance parameters themselves. Further the method of the latter reference places a demand on the user to provide a set of test stimuli, hence the method provides no assistance in generating or optimizing the test stimuli.
Moreover, an additional problem encountered in testing RF circuits is the need for very high frequencies in the test signal. This imposes an additional cost on testing, as the ATE needed to produce high frequency test signals of arbitrary shape is more complex and difficult to use. Neither of the aforementioned prior art test methodologies has addressed this problem.
Accordingly, there is a need for a method and apparatus for low cost signature testing of both RF and analog circuits that provides more information about circuit performance parameters and provides more information about the manufacturing process.